In recent years, a crystal oscillating circuit has often been used for generating a reference frequency in an electronic apparatus, and furthermore, a transmitting data rate has also been increased. In such an electron apparatus, an intermittent operation and a low voltage operation are carried out in order to obtain a low power consumption, and a reference frequency has also been required to have a reduction in a phase noise. For this reason, there has been desired a crystal oscillating circuit in which starting can be carried out in a short time for the crystal oscillating circuit to be used for obtaining these frequencies to be references, a low phase noise is made and a constant oscillating output is obtained. Consequently, the oscillating circuit is very useful as a circuit technique.
There has been known a crystal oscillating circuit described in Patent Document 1, for example. A conventional crystal oscillating circuit will be described below. FIG. 9 is a circuit diagram showing an example of the conventional crystal oscillating circuit. In FIG. 9, 2 denotes an oscillating circuit portion, 3 denotes a load capacity selecting portion, and 10 denotes a crystal oscillating member. The conventional crystal oscillating circuit has such a structure as to supply the power of the oscillating circuit portion 2 by a power terminal 11, to form an oscillating loop by the crystal oscillating member 10, the oscillating circuit portion 2 and the load capacity selecting portion 3, and to control the load capacity selecting portion 3 by a frequency regulating circuit 6, a sensitivity regulating circuit 7 and a frequency setting circuit 8, thereby regulating a sensitivity to be the rate of a change in an oscillation frequency (which will be hereinafter referred to as a frequency sensitivity).
Referring to the crystal oscillating circuit having the structure described above, an operation thereof will be described below. When a power voltage is applied from the power terminal 11, it is supplied to the oscillating circuit portion 2, the load capacity selecting portion 3 and the crystal oscillating member 10, and furthermore, an electric potential is applied to the control terminal of the load capacity selecting portion 3 so that a load capacity seen from the crystal oscillating member 10 is determined and a frequency is determined by (Equation 1) and (Equation 2).f=1/(2×π×(L1×C1)0.5)×(1+C1/(C0+CL)) 0.5  (Equation 1)CL=C01×C02/(C1+C2)  (Equation 2)
L1, C1 and C0 in the (Equation 1) and (Equation 2) represent an equivalent circuit constant of the crystal oscillating member, CL represents a load capacity seen from the crystal oscillating member, and C01 and C02 represent a capacity value selected by the load capacity selecting portion.
Moreover, the gate voltage of the MOS transistor of the load capacity selecting portion 3 is controlled to cause an oscillation frequency to be variable in response to a voltage signal controlled by the frequency regulating circuit 6, the sensitivity regulating circuit 7 and the frequency setting circuit 8. When MOS transistors 47 to 49 and 47′ to 49′ of an MOS transistor portion are set in an OFF state, therefore, a load capacity is equivalent to a non-connection state if capacitors 20, 21, 20′ and 21′ and switches 35, 36, 35′ and 36′ connected in series in the switch portions of the load capacity selecting portion 3 are set in an OFF state. Alternatively, a whole load capacity is set to be only a capacity connected in series to the switch depending on the states of the switches 35, 36, 35′ and 36′ of the switch portion.
To the contrary, when the MOS transistor is set in an ON state, there is set a load capacity for only the capacitors 20, 21, 20′ and 21′ connected in series to the switches 35, 36, 35′ and 36′ and a capacitor in an ON state of the MOS transistor if an ON-state resistance thereof is sufficiently low. Therefore, there is freely set a frequency sensitivity by a control voltage to be applied to the gates of the MOS transistors 47 to 49 and 47′ to 49′ connected in series to the capacitor and the control of the switches 35 to 39 and 35′ to 39′.
(Patent Document 1) JP-A-9-102714 Publication
In the oscillating circuit shown in FIG. 9, however, the voltage signal controlled by the frequency regulating circuit, the sensitivity regulating circuit and the frequency setting circuit is applied to the gate of each MOS transistor of the load capacity selecting portion. Therefore, the ON-state resistance of the MOS transistor is changed upon receipt of the influence of the voltage noise of the voltage signal which is controlled. Consequently, the capacitance value of the load capacity selecting portion is changed so that the frequency is varied and a jitter is thus increased. As a result, there is a conventional unsolved problem in that a phase noise is increased.
Furthermore, there is also a problem in that a phase in switching is discontinuously changed in order to switch a load capacity having a predetermined capacitance value, resulting in a remarkable deterioration in the phase noise in such a structure that a load capacity is caused to be variable to change an oscillation frequency in order to change over the load capacity depending on a temperature characteristic.
Moreover, a reduction in a starting time depends on the ratio of an amplitude in starting to an amplitude in a normal state, the value of a negative resistance R, a load capacity and an amplification factor. For this reason, in the oscillating circuit shown in FIG. 9 according to a conventional example, a switch for regulating the sensitivity of a frequency is provided so that a load capacity seen from the crystal oscillating member is connected to make a difference between a negative resistance R and an amplitude to be input to the oscillating circuit in the starting as compared with an oscillating circuit in which the switch is not provided. As a result, there is also a problem in that the starting time is delayed.
In order to solve the problems of the conventional art, it is an object of the invention to provide a crystal oscillating circuit capable of obtaining a stable operation having a low phase noise. Moreover, it is an object of the invention to provide a crystal oscillating circuit capable of obtaining an oscillating output which does not delay a starting time.